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  Datasheet File OCR Text:
 MITSUBISHI ICs (COMMUNICATION)
M64821FP
1 CHIP SYNTHESIZER & MODULATOR FOR PHS
DESCRIPTION
The M64821FP is a semiconductor consisting of PLL and Modulator. Using Bi-CMOS technology, it contains dual PLL (1.8GHz, 550MHz), a mixer for 2nd IF, transistor for VCO , modulator and Up-convertor on chip.
PIN CONFIGURATION (TOP VIEW)
FEATURES
* Built-in 2nd mixer and RSSI * Vcc=2.7 to 3.6V * Icc= TYP.41mA (TX.), TYP.23mA (RX.) * Built-in high accuracy phase shifter (CR type) * Large Output (-13dBm type) * Attenuator for Gain Control * Gain characteristics with temperature dependent * Built-in transistor and Buffer for 2nd Local VCO * Built-in Buffer for 1.6GHz VCO * Small Package (48pin QFP, lead pitch 0.5mm)
Outline
48P6D
APPLICATION
Digital cordless phone (PHS) BLOCK DIAGRAM
to 1stMIX from BBIC to CINpin
QB signal input IB signal input Q signal input I signal input CP1 Charge pump output Vcc(CP)
CP2 Charge pump output
VCO1
LOCK Lock Det. output
LPF
LE Load enable
SI Serial Data
CPS Clock
GND(VCO)
L,C Osc. Cir.
Vcc(VCO) LIMOUT RSSI
GND(CP)
to BBIC (Demod.)
to BBIC
LPF
Control signals of PLL(from BBIC)
1
2
3
4
27
26
25
18
21
20
19
11
6
7
8
9
32
33
ON/OFFControl (from BBIC)
17 CTL1(MainPLL) 16 CTL2(LocalPLL)
E
Vcc(MOD) GND(MOD)
5 48 O
CP1
Lock Det
Decoder
CP2
2nd Local VCO
B
15 CTL3(MOD&Up-Conv.) 14 CTL4(LIM&2ndMIX) 13 CTL5(X'tal osc)
GND(SUB)
38
PLL1 (1st Local) 300KHz
PLL2 (2nd Local) 100KHz 1/2
RSSI
34 Vcc(LIM) 31 GND(LIM) DECOUPLE
from BBIC
GAIN CONT
47
Prescaler
fREF1
fREF2
36
LIM IN 35
BPF
BPF to RFIC
TX OUT 45
Up Conv.
OSC
2nd MIX
37 41 43
MIX2OUT GND GND
46 GND(UPCON)
44 Vcc(UPCON)
29 Vcc(Prescaler)
30 CIN
28 GND(Prescaler)
24 XOUT
23 XIN
22 XBO
12 GND(PLL)
10 Vdd(PLL)
40 GND(MIX)
39 MIX2IN
42 Vcc(MIX)
from VCO1
X'tal to BBIC
Matching Cir.
BPF
1stIF
MITSUBISHI ELECTRIC
1


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